Accessing Input Output Devices
modern
computers use single bus arrangement for connecting I/O devices to CPU
& Memory
The bus enables all the devices connected to it to exchange information
Bus
consists of 3 set of lines : Address, Data & Control Lines
Processor
places a particular address (unique for an I/O Device.) on address lines
Device
which recognizes this address responds to the commands issued on the
Control lines
Processor requests for either Read / Write
The data will be placed on Data lines
It
is a special hardware used to connect the I/O device to the bus , i.e, I/O
interface.
The
I/O module has 3 section
(a)Address decoder It
enables the device to recognize its address when this address appears on the
address lines.
(b)Data register The
data register holds the data being transferred to or from the processor.
The
status register contains information relevant to the operation of the I/O
module.
Both
the data and status register are connected to the data bus.
MODES OF DATA TRANSFER
Programmed I/O Mode
In
programmed I/O mode data are exchanged between the processor and the I/O
module. When a processor is executing a program and encounters an
instruction relating to I/O, it executes that instruction by issuing a command
to that appropriate I/O module. With programmed I/O the I/O module will
perform the requested action and then set the appropriate bit in the I/O
status register .
The I/O module takes no further action to alert the processor
(it doesn’t
interrupt the processor).
The I/O commands issued by the processor to the I/O module
- Test
- Control
- Read
- Write
- Polling
- Waiting for interrupt signal.
- Starting address of memory block
- The word count
- Control to specify the mode of transfer such as read or write.
- A control to start the DMA transfer.
- Cycle stealing
- Brust mode
Memory Mapped I/O
There
is a single address space for memory location and I/O devices.
( the address
space is shared)
With
memory mapped I/O a single read line a single write line are needed on the
bus. The bus may be equipped with memory read and write plus Input and
output command lines.
Now
the command lines specifies whether the address refers to memory location or
an I/O device.
Most
CPU uses memory mapped I/O.
Always CPU assigns address to memory some of memory space is stolen and
assigned to I/O device.
It
deals with fewer address lines.
Interrupt Driven I/O
In
this method the program issues an I/O command and than continues to execute
untill it is interrupted by the I/O hardware to signal the end of I/O
operation.
Here the program enters a wait loop in which it repeatedly checks the device
status. During this process the processor is not performing any useful
computation.
There are many situations where tasks can be
performed while waiting for an I/O device to be ready, to allow this the I/O
device should alert the processor when it becomes ready. It can be done by
sending a hardware signal called an interrupt.
The routine executed in response to an interrupt
request is called Interrupt
Service Routine(ISR).
The
processor first completes execution of instruction then it loads the program
counter(pc) with the address of 1st instruction of ISR.
Direct Memory Access
In this method the
input and output devices read/write information from the main memory
without interference of the CPU through the system bus.
For
I/O transfer, processor determines the status of I/O by:
Considerable Overhead
is incurred in above I/O transfer processing.
By
DMA approach , large blocks of data at high speed can be sent between external
device and main memory.
DMA CONTROLLER
It
allows the data transfer between I/O device and memory.
DMA
controllers acts a processor but it is controlled by the CPU. To initiate the
transfer of a block of words, the processor sends the following data to
controller
The
DMA controller performs the required I/O operation and send a interrupt to the
processor upon completition.
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